Laser processing systems employed for processing dynamic random access memory (DRAM) and other semiconductor devices commonly use a Q-switched diode pumped solid state laser. When processing memory devices, for example, a single laser pulse is commonly employed to sever an electrically conductive link structure. In other industrial applications, laser scribing is used to remove metal and dielectric semiconductor materials from a semiconductor device wafer prior to dicing. Lasers may also be used, for example, to trim resistance values of discrete and embedded components.
Some laser processing systems use different operating modes to perform different functions. For example, the ESI Model 9830 available from Electro Scientific Industries, Inc. of Portland, Oreg., the assignee of the present patent application, uses a diode pumped Q-switched neodymium-doped yttrium vandate (Nd:YVO4) laser operating at a pulse repetition frequency of approximately 50 kHz for laser processing of semiconductor memory and related devices. This laser system provides a pulsed laser output for processing link structures and a continuous wave (CW) laser output for scanning beam-to-work targets. As another example, the ESI Model 9835, also available from Electro Scientific Industries, Inc., uses a diode pumped Q-switched, frequency-tripled Nd:YVO4 laser for laser processing semiconductor memory and related devices. This laser system uses a first pulsed laser output at a PRF of approximately 50 kHz for processing link structures and a second pulsed laser output at a PRF of approximately 90 kHz for scanning beam-to-work targets. In some systems, higher PRFs (e.g., approximately 100 kHz) are also possible. Generally, the pulse widths of laser pulses generated by such laser systems are functionally dependent on the PRF selected and are not independently adjustable based on differences between target structures or other process variables.
FIGS. 1A and 1B are example temporal pulse shapes of laser pulses generated by typical solid state lasers. The pulse shown in FIG. 1A may have been shaped by optical elements as is known in the art to produce a square-wave pulse. As shown in Table 1 and in FIGS. 1A and 1B, a typical solid state pulse shape is well described by its peak power, pulse energy (time integration of the power curve), and pulse width measured at a full-width half-maximum (FWHM) value. Feedback from a pulse detector may be used to determine pulse energy and/or peak power. The pulse detector used for feedback may include a diode coupled to an analog peak capture-and-hold circuit for peak power sensing. The pulse detector may also include an analog integration circuit for pulse energy measurements.
Many memory devices and other semiconductor devices include a dielectric passivation material that covers the electrically conductive link structures. The overlying passivation material helps to contain the metallic link material so that it can be heated above an ablation threshold. For example, FIGS. 2A, 2B, 2C, and 2D are cross-sectional block diagrams of a semiconductor device 200 that includes passivated electrically conductive link structures 210, 212, 214. As shown in FIG. 1A, the semiconductor device 200 may include one or more layers of dielectric passivation material 216 formed over a semiconductor substrate 218. In this example, the semiconductor substrate 218 comprises silicon (Si), the dielectric material comprises silicon dioxide (SiO2), and the electrically conductive link structures 210, 212, 214 comprise Aluminum (Al). Generally, the electrically conductive link structures 210, 212, 214 are located within the dielectric material 216. In other words, the dielectric material is adjacent to both top and bottom surfaces of the electrically conductive link structures 210, 212, 214 such that the electrically conductive link structures 210, 212, 214 are not directly exposed to a processing laser beam 220. Rather, the laser beam 220 passes through an overlying portion of the dielectric passivation material 216 before interacting with a selected electrically conductive link structure 212.
In FIG. 2A, interaction between the laser beam 220 and the selected electrically conductive link structure 212 causes the electrically conductive link structure 212 to heat up. Heating causes pressure inside the electrically conductive link structure 212 to increase. The dielectric passivation material 216 traps the heat and prevents portions of the heated electrically conductive link structure 212 from being ejected onto the adjacent electrically conductive link structures 210, 214. In other words, the dielectric passivation material 216 prevents liquified portions of the electrically conductive link structure 212 from “splashing” onto other portions of the semiconductor device 200. For illustrative purposes, FIG. 2B shows an enlarged view of a portion of the dielectric passivation material 216 surrounding the electrically conductive link structure 212. As shown in FIG. 2B, continued heating may cause cracks 222 to open from upper corners of the electrically conductive link structure 212. Once the electrically conductive link structure 212 reaches an ablation threshold, as shown in FIG. 2C, the electrically conductive link structure 212 may explode, which may cause the overlying dielectric passivation material 216 and portions of the electrically conductive link structure 212 to be removed as vapor 224. As shown in FIG. 2D, the laser beam 220 may then clean out remaining portions of the electrically conductive link structure 212, if any, through boiling, melting, and/or splashing.
While an overlying passivation layer keeps the electrically conductive link material contained until it heats above the ablation threshold, it may be difficult to sufficiently control passivation thickness. Integrated circuit (IC) manufactures generally invest a considerable amount of effort into forming the passivation layer thickness into a suitable range for processing. Without the overlying passivation material (e.g., when processing an unpassivated or bare metal link), however, laser processing generates metal splash that can form an electrical connection (e.g., a short circuit or electrically conductive bridge) with an adjacent electrically conductive link structure, which may result in a device failure. For example, FIG. 3 is an electron micrograph showing unpassivated link structures 310 having an area 312 where adjacent links have melted together during laser processing using a Gaussian-shaped pulse. In this example, the unpassivated link structures 310 comprise aluminum and are about 4 μm wide (about 1 μm pitch). FIG. 3 also shows an area 314 where a blown link resulted in excessive debris. In addition to splash and bridge issues, unpassivated electrically conductive link structures may have smaller process windows when compared to passivated electrically conductive link structures.
Other laser processing applications may also suffer from splashing. For example, laser scribing may be used to remove metal and dielectric semiconductor materials from a semiconductor device wafer prior to dicing. If thick or unpassivated metals are present in an area to be scribed, the process window may be greatly reduced due to metal splash and/or metal melt and reflow into the scribed area. For example, FIG. 4 is an electron micrograph showing an unpassivated copper wire 410 (Cu) on silicon (Si) 412 that was scribed with a plurality of Gaussian shaped pulses. A kerf 414 scribed by the laser pulses has poorly defined edges because the copper melted and reflowed into the kerf 414 (shown at arrow 416). FIG. 4 also shows that scribing the bare metal copper wire 410 created excessive debris (shown at arrows 418). The laser scribe rate may be slowed down to address problems with metal splash, reflow, cracking, and delamination, which may significantly impact scribing throughput.